ict-sis- Published Papers
Online Task Scheduling of Dynamically Reconfigurable Architecture: A Latency-Aware Approach

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Online Task Scheduling of Dynamically Reconfigurable Architecture: A Latency-Aware Approach  
Seyed Mehdi Mohtavipour
School of Electrical Engineering
Iran University of Science and Technology
Tehran, Iran
Hadi Shahriar Shahhoseini
School of Electrical Engineering
Iran University of Science and Technology
Tehran, Iran

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Reconfigurable architectures can take advantage of reconfiguration capability to improve performance and flexibility. Most important parts of these systems, are task scheduling and resource management. As scheduling needs more awareness of resource statues, we propose a novel latency-aware task scheduling by extending decision moments from arrival time to before execution time. The gap time due to waiting times and heavy workload, provides more opportunity to take better decisions and based on it, two service disciplines are used, Earliest Deadline First Service (EDFS) and Highest Speedup First Service (HSFS). We show that latency-aware approach outperforms previously reservation method and in simulation results about 32% improvement are obtained for rejection ratio evaluation metric.

Keywords: Reconfigurable Hardware, FPGA, Scheduling, Workload


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Cite this paper as:
S. M. Mohtavipour, and H. S. Shahhoseini, 2017, "Online Task Scheduling of Dynamically Reconfigurable Architecture:A Latency-Aware Approach", 2nd International Conference on Electrical Engineering, Allameh Majlesi University, Tehran.
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